Computer Architecture Papers

• uica: accurate throuhgut prediction of basic blocks on recent intel uarch
  Very interesting paper describing modeling of intel x86 execution pipelines from around haswell era. As a treat contains a lot of microarchitectural information.
• the mips R10000 superscalar microprocessor
  Describes Out of Order, Superscalar, RISC processor implementing MIPS instruction set. Great description of how the entire pipeline of a real world processor works.
• Very High Speed Computing Systems
  Categorizes computing systems based on execution and data processing (SISD, SIMD, MISD, MIMD), pretty interesting but many ideass discussed out of nowhere.
• Very Long Instructionn Word Architectures And The ELI-512
  Introduces VLIW. Describes an extreme case of horizontal control on a specific example, includes software and hardware techniques to exploit parallelism.
• Architecture of the IBM system/360
  Introduces the concept of ISA shared between different implementations through design goals, then describes a bitt of system/360 in particular.
• There's plenty of room at the top, what will drive computer performance after moores law
  Not very focused, but mentions few techniques of exploiting performance and judges them based on applicability.
• Performance of the VAX-11/780 Translation Buffer: simulation and measurement
  Very specific, not much to comment on, good paper.
• The Case for the Reduced Instruction Set Computer
  Comments on "The case for the reduced instruction set computer"
  Instruction sets and beyond: computers, complexity and controversy
  First paper introduces RISC but all three nicely compose to read about how RISC was introduced historically - they mention its various tradeoffs.
• google workloads for consumer devices: mitigating data movement bottlenecks
  Describes problems of performance at larger scale and their mitigation with Processing in Memory.
• validity of the single processor approach to achieving large scale computing capabilities
  Introduces Amdahl's law, short and unclear.
• an efficient algorithm for exploiting multiple arithmetic units
  Introduces Tomasulo's Algorithm - Out of Order Execution, well explained but lacks benchmarks.
• the stanford dash multiprocessor
  Introduces directory based cache coherence, interesting and understandable read, also describes processor as a treat.
• power struggles: revisiting the RISC vs CISC debate on contemporary ARM and x86 architectures
  Comparison of energy efficiency between RISCs and CISCs, a bit dated, I need to verify its quality.
• a characterization of processor performance in the VAX-11/780
  VAX-11/780 benchmark, interesting read about techniques of benchmarking computing system AND about actual benchmarks.
• risc assesment a high level language experiment
  
• profiling a warehouse scale computer
  Performance characterization of computer at scale not known to mere mortals.
• In Datacenter Performance Analysis of a Tensor Processing Unit
  Analysis of TPU - coprocessor designed to multiply matrices, interesting read about TPU, performance characteristics, and coprocessors.
• a case for exploiting subarray level parallelism in dram
  a logic in memory computer
  Processing in memory papers, introduce few simple and easy to implement operations.
• vlsi risc
  Description of process of developing RISC on VLSI. describes few interesting features like register window.